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NP-Complete Parallel Thread Placement Addressed in Milliseconds via MIT “Best...
The problem of jointly allocating computations and data is a known NP-hard problem. A heuristic proposed by MIT researchers Nathan Beckmann, Po-An Tsai, and Daniel Sanchez recently the best-paper award...
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First Trinity Testbed Hardware Delivered – Likely Running Knights Landing
The NNSA blog reports that the first Trinity test bed hardware has been delivered to both LANL and Sandia. Two systems were delivered to Los Alamos and one to Sandia. No word if any of these systems...
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Intel Xeon Phi Benefits Commercial Engineering Simulation Code
ANSYS and Intel worked closely together to optimize the first commercial engineering simulation package multi-core Intel® Xeon® processor E5-2600 v2 and v3 families and the many-core Intel® Xeon Phi™...
View ArticleRumor – US Bans Intel Xeon Phi Sales in China
In the unsubstantiated rumor but worth knowing if true category, VRworld reported that the US government has banned Intel Xeon Phi sales in China. Intel Xeon Phi is the current basis of the 33 PF/s...
View ArticleGCC 5.1 Now Available – Includes Preliminary OpenACC and OpenMP 4.0
The GNU project has released GCC 5.1, which is a major update including a preliminary version of OpenACC and OpenMP 4.0 capability. The source code can be downloaded and built from the mirror sites or...
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Intel Extends Barcelona Supercomputing Center
Intel extended it’s research collaboration with the Barcelona Supercomputing Center (BSC) – one of four Intel exascale labs in Europe. Begun in 2011 and now extended to September 2017, the Intel-BSC...
View ArticleMore Trinity Racks Installed
“The proof of the pudding is in the tasting” is coming to fruition for the Trinity procurement as Cray installs more racks of the Trinity self-hosted Intel Knights Landing (KNL) processors. Each set of...
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Tenure Track Position in Computer Science at Cal Poly San Luis Obispo
The Cal Poly San Luis Obispo Computer Science department is hiring a tenure-track faculty position in HPC. Click here for a direct link to the position description. They have a shiny new lab for...
View ArticleNow Online – Presentations and Videos from Houston 2015 Directives and Tools...
The presentations and videos from the October 12 University of Houston “2015 Directives and Tools for Accelerators” workshop are now available online. As with last year’s workshop, this workshop was...
View ArticlePGI/NVIDIA To Develop LLVM-based Open-Source Fortran Compiler for NNSA and...
PGI (The Portland Group) is working with the NNSA to create an open-source Fortran compiler designed to integrate with the widely used LLVM compiler infrastructure. Recently, PGI announced comparable...
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Code Modernization Efforts Deliver a 32.9X Speedup in STAC-A2™ Financial...
Global financial industry leaders such as Citi and J.P. Morgan have acknowledged they are currently modernizing their code via collaborative efforts with the Intel Software and Solutions Group. Results...
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Pascal upgrade and Intel Xeon Phi at the Swiss National Supercomputing Centre
It was announced at GTC 2016 that the Piz Daint system at the Swiss National Supercomputing Center (CSCS) in Lugano, Switzerland will be upgraded to 4,500 Pascal GPUs. No date was stated for when the...
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NVIDIA –“[Intel] Should Get Their Facts Straight” on Machine Learning Benchmarks
NVIDIA responds to the machine learning benchmark results presented by Intel at ISC’16, “It’s great that Intel is now working on deep learning. This is the most important computing revolution with the...
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Up To Orders of Magnitude More Performance with Intel’s Distribution of Python
Intel has created a freely downloadable, optimized Python distribution that can greatly accelerate Python codes. Benchmarks show that two order of magnitude speedups (over 100x) can be achieved by...
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Come learn and meet the experts at the 2016 Intel HPC Developer Conference –...
Sponsored Content Come learn and meet the experts at the Intel 2016 HPC Developer Conference – just before SC16! Arrive early at Supercomputing 2016 and fuel your insight with focused technical...
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Accelerating Python and Deep Learning
Sponsored Content “For deep learning to have a meaningful impact and business value, the time to train a model must be reduced from weeks to hours,” observed Ananth Sankaranarayanan, Intel’s director...
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SURFsara Achieves Accuracy and Performance Breakthroughs for Both Deep...
Sponsored Content SURFsara posted the best accuracy and an under 40 minute training time on some popular deep learning architectures and data sets to establish new single-model state-of-the-art results...
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Third-Party Use Cases Illustrate the Success of CPU-based Visualization
John Stone (Research Staff, The Beckman Institute) points out that improvements in the AVX-512 instruction set in the Intel Xeon Phi (and latest generation Intel Xeon processors) can deliver...
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